Typos in Textbook

Pages 225-227 - The correct part number for Sharp IR Distance sensor is "GP2D02". In several places in the text, it appears as "GPD2D02".

Page 277 - Problem 7 at beginning of first sentence - Change "Add and Test" to " Verify proper operation of"
 
 
 

Software Updates

It is strongly recommended that you do not update to version 10.0 or higher of Altera's Quartus tools. Major changes have been made to the tools. Many LPM functions are gone, the simulator now only uses ModelSim with scripting for inputs, no GUI is available to setup inputs and it is not as student friendly as earlier versions. Any earlier simulation tutorials and projects will need to be completely redone. This will likely be fixed in a future edition of the textbook, but it will take time. Fortunately older versions (i.e., 9.1 SP2) are still available for download at Altera. The features added in 10.0 and higher are only critical if you have one of the newest FPGA chips, and they are not the ones used on the low cost education boards. You may also want to update to the newest edition of the book - see info here

The onepulse.vhd code in Chapter 5 generates an error message when it is compiled with the new compiler. Just delete the Process sensitivity list [i.e. Process  "(clock)" ] to fix it. If you add a new reset input to the onepulse.vhd code for initialization, you will need to replace the sensitivity list.

The new compiler wants state machines to always have a reset - if there is no reset, you can no longer assume that FF devices power up to "0"s and it tends to delete the circuit. The problem is fixed by adding a reset. Here is a modified version of the Sharp IR distance sensor VHDL code with an added reset.
 
 

Software Updates for new DE2 board

Complete Quartus II Project files for the book's Chapter 1-15 labs for the new DE2 board are available in a zip file here. See the README file in the zip file for additional information.
 

Nios processor projects for the DE2 from Chapters 16  & 17 are in a second zip file here.

There are a few minor differences in function from the UP3 version in the textbook for the NIOS projects in Chapters 16 & 17:
 
1) Since the DE2 board uses the USB Blaster, the JTAG port is used for all communication (including stdin, stdout, stderr).  This works great on the USB Blaster and allows them to run these tutorials with just a USB cable (i.e., they do not need a 9-pin serial cable).  The UART interface works as well and all they have to do is follow the directions in the textbook to set the downloader to use the UART for the stdin, stdout, and stderr interfaces if they want to match the textbook exactly.
 
2) SRAM does not work as the program memory.  It works great as data memory, but the downloader doesnít program the SRAM when it is used as program memory.  It may be that it has something to do with these particular SRAM chips or the driver.  SLS sent their own driver for the DE2ís SRAM.  Using their driver the software download program or on-chip JTAG module isnít supported? In any event, we just selected SDRAM as the program memory for these projects and everything works fine.  You can read and write to SRAM, SDRAM, and Flash.

 
 
 

  Tips on Porting your existing UP1/UP2/UP3 Designs to the DE2

Existing designs from earlier Altera boards can be ported to the DE2. First, you will need to change the FPGA device family to Cyclone II, the device type to EP2C35F672C6, and redo all pin assignments. Pin assignments can be found in the DE2 User Manual. Recall that pin assignments are stored in a project's *.qsf file and you can cut and paste them from another DE2 project file to save time or change them one at a time in the assignment editor.

Pushbuttons on the DE2 now have a simple hardware debounce circuit. The debounce core function is not needed in most cases.

Designs using the LCD will need to drive the new LCD_ON output bit high.

The DE2's VGA Video DAC supports more colors and requires a clock (pixel clock) and a blanking signal (video on). These signals already exist in the Video Sync core, but need to be output and connected to the correct pin. Old RGB "digital" color RGB output bits (UPx boards had no DAC) can be tied to a couple of the highest DAC bits (DAC has 8-bits/RGB color) to generate the correct colors.
 
 

Software Updates for new DE1 board

We plan to develop these during the Summer of 2006 once we have obtained a DE1 board.