C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 1 C51 COMPILER V7.06, COMPILATION OF MODULE ISR OBJECT MODULE PLACED IN ISR.OBJ COMPILER INVOKED BY: d:\Keil777\C51\BIN\C51.EXE ISR.C BROWSE DEBUG OBJECTEXTEND stmt level source 1 2 #include 3 #include 4 #include *** WARNING C318 IN LINE 4 OF ISR.C: can't open file 'unistd.h' 5 #include "BasicTyp.h" 6 #include "common.h" 7 #include "USB.h" 8 #include "HAL4D13.h" 9 #include "isr.h" 10 #include "iso.h" 11 #include "mainloop.h" 12 #include "usb_irq.h" 13 14 15 // ************************************************************************ 16 // Public static data 17 // ************************************************************************ 18 19 extern D13FLAGS bD13flags; 20 extern USBCHECK_DEVICE_STATES bUSBCheck_Device_State; 21 extern CONTROL_XFER ControlData; 22 23 //extern unsigned short ioSize, ioCount; 24 25 26 // ************************************************************************ 27 // ISR Subroutine 28 // ************************************************************************ 29 void usb_isr(void) 30 { 31 1 //disable(); 32 1 IOWR(PIO_0_BASE, 2, 0);//DIS INT1 *** ERROR C202 IN LINE 32 OF ISR.C: 'PIO_0_BASE': undefined identifier 33 1 IOWR(PIO_0_BASE, 3, 0);//CLAER *** ERROR C202 IN LINE 33 OF ISR.C: 'PIO_0_BASE': undefined identifier 34 1 printf("interrupt \n"); 35 1 Hal4D13_LockDevice(0); 36 1 fn_usb_isr(); 37 1 38 1 39 1 IOWR(PIO_0_BASE, 2, 2);//EN INT1 *** ERROR C202 IN LINE 39 OF ISR.C: 'PIO_0_BASE': undefined identifier 40 1 // enable(); 41 1 } 42 43 void fn_usb_isr(void) 44 { 45 1 ULONG i_st; 46 1 47 1 bD13flags.bits.At_IRQL1 = 1; 48 1 49 1 i_st = Hal4D13_ReadInterruptRegister(); 50 1 51 1 if(i_st != 0) C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 2 52 1 { 53 2 if(i_st & D13REG_INTSRC_BUSRESET) 54 2 Isr_BusReset(); 55 2 else if(i_st & D13REG_INTSRC_SUSPEND) 56 2 Isr_SuspendChange(); 57 2 else if(i_st & D13REG_INTSRC_EOT) 58 2 Isr_DmaEot(); 59 2 else if(i_st & (D13REG_INTSRC_SOF|D13REG_INTSRC_PSEUDO_SOF)) 60 2 Isr_SOF(); 61 2 else if(i_st & D13REG_INTSRC_SHORT_PACKET) 62 2 Isr_SHORT_PACKET(); 63 2 else if(i_st & D13REG_INTSRC_RESUME) 64 2 { 65 3 printf("RESUME\n"); 66 3 Hal4D13_LockDevice(0); 67 3 } 68 2 69 2 else 70 2 { 71 3 if(i_st & D13REG_INTSRC_EP0OUT) 72 3 Isr_Ep00RxDone(); 73 3 if(i_st & D13REG_INTSRC_EP0IN) 74 3 Isr_Ep00TxDone(); 75 3 if(i_st & D13REG_INTSRC_EP03) 76 3 Isr_Ep03Done(); 77 3 if(i_st & D13REG_INTSRC_EP04) 78 3 Isr_Ep04Done(); 79 3 if(i_st & D13REG_INTSRC_EP05) 80 3 Isr_Ep05Done(); 81 3 if(i_st & D13REG_INTSRC_EP06) 82 3 Isr_Ep06Done(); 83 3 } 84 2 } 85 1 86 1 bD13flags.bits.At_IRQL1 = 0; 87 1 } 88 89 void Isr_BusReset(void) 90 { 91 1 printf("BUS RESET\n"); 92 1 bD13flags.bits.DCP_state = 0x00; 93 1 bD13flags.bits.dma_disable=0x00; 94 1 95 1 bUSBCheck_Device_State.State_bits.DEVICE_DEFAULT_STATE = 1; 96 1 bUSBCheck_Device_State.State_bits.DEVICE_ADDRESS_STATE = 0; 97 1 bUSBCheck_Device_State.State_bits.DEVICE_CONFIGURATION_STATE = 0; 98 1 config_endpoint(); 99 1 } 100 101 void Isr_SuspendChange(void) 102 { 103 1 bD13flags.bits.suspend=1; 104 1 } 105 106 void Isr_SHORT_PACKET(void) 107 { 108 1 printf("SHORT PACKET INTERRUPT\n"); 109 1 } 110 111 void Isr_DmaEot(void) 112 { 113 1 bD13flags.bits.dma_disable =0; C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 3 114 1 115 1 if(bD13flags.bits.dma_state == DMA_PENDING) 116 1 bD13flags.bits.setup_dma = 1; 117 1 else 118 1 bD13flags.bits.dma_state = DMA_IDLE; 119 1 printf("EOT reached!!!\n"); 120 1 if(bD13flags.bits.verbose==1) 121 1 printf("dma_counter = %x\n", Hal4D13_GetDMACounter()); 122 1 printf("\n"); 123 1 } 124 125 126 void Isr_SOF(void) 127 { 128 1 129 1 } 130 131 void Isr_Ep00RxDone(void) 132 { 133 1 UCHAR ep_last, i; 134 1 135 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0_CONTROL_OUT); /* Clear interrupt flag */ 136 1 137 1 if (ep_last & D13REG_EPSTS_SETUP) 138 1 { 139 2 if(bD13flags.bits.DCP_state == USBFSM4DCP_REQUESTPROC) 140 2 { 141 3 ControlData.Abort = 1; 142 3 bD13flags.bits.DCP_state = USBFSM4DCP_SETUPPROC; 143 3 } 144 2 else 145 2 bD13flags.bits.DCP_state = USBFSM4DCP_SETUPPROC; 146 2 } 147 1 else /* not a setup packet, just a Data Out Packet */ 148 1 { 149 2 switch (bD13flags.bits.DCP_state) 150 2 { 151 3 case USBFSM4DCP_DATAOUT: 152 3 153 3 i = Hal4D13_ReadEndpoint(EPINDEX4EP0_CONTROL_OUT, ControlData.dataBuffer + ControlData.wCount, 154 3 EP0_PACKET_SIZE); 155 3 156 3 ControlData.wCount += i; 157 3 if( i != EP0_PACKET_SIZE || ControlData.wCount >= ControlData.wLength) 158 3 { 159 4 bD13flags.bits.DCP_state = USBFSM4DCP_REQUESTPROC; 160 4 161 4 } 162 3 break; 163 3 case USBFSM4DCP_HANDSHAKE: 164 3 165 3 bD13flags.bits.DCP_state = USBFSM4DCP_IDLE; 166 3 break; 167 3 168 3 case USBFSM4DCP_STALL: break; 169 3 170 3 case USBFSM4DCP_SETUPPROC: break; 171 3 172 3 case USBFSM4DCP_REQUESTPROC:break; 173 3 174 3 case USBFSM4DCP_DATAIN: break; 175 3 C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 4 176 3 default: 177 3 printf("Fatal Error: Isr_Ep0RxDone ReadLastTranactionStatus=%x\n",ep_last); 178 3 bD13flags.bits.DCP_state = USBFSM4DCP_STALL; 179 3 Hal4D13_StallEP0InControlWrite(); 180 3 break; 181 3 } 182 2 } 183 1 return ; 184 1 } 185 186 void Isr_Ep00TxDone(void) 187 { 188 1 short i = ControlData.wLength - ControlData.wCount; 189 1 UCHAR ep_last; 190 1 191 1 192 1 Hal4D13_ReadInterruptRegister(); 193 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0_CONTROL_IN); /* Clear interrupt flag */ 194 1 195 1 switch (bD13flags.bits.DCP_state) 196 1 { 197 2 case USBFSM4DCP_HANDSHAKE: 198 2 break; 199 2 case USBFSM4DCP_DATAIN: 200 2 if( i >= EP0_PACKET_SIZE) 201 2 { 202 3 Hal4D13_WriteEndpoint(EPINDEX4EP0_CONTROL_IN,ControlData.Addr.pData + ControlData.wCount, EP0_PACKET_SI -ZE); 203 3 ControlData.wCount += EP0_PACKET_SIZE; 204 3 205 3 // State remains at USBFSM4DCP_DATAIN 206 3 207 3 } 208 2 else if( i != 0) 209 2 { 210 3 Hal4D13_WriteEndpoint(1, ControlData.Addr.pData + ControlData.wCount, i); 211 3 ControlData.wCount += i; 212 3 213 3 bD13flags.bits.DCP_state = USBFSM4DCP_HANDSHAKE; 214 3 LowerIRQL(); 215 3 216 3 } 217 2 else if (i == 0) 218 2 { 219 3 Hal4D13_SingleTransmitEP0(0, 0); 220 3 bD13flags.bits.DCP_state = USBFSM4DCP_HANDSHAKE; 221 3 } 222 2 break; 223 2 case USBFSM4DCP_REQUESTPROC: break; 224 2 case USBFSM4DCP_IDLE: break; 225 2 case USBFSM4DCP_SETUPPROC: break; 226 2 case USBFSM4DCP_STALL: break; 227 2 case USBFSM4DCP_DATAOUT: break; 228 2 default: 229 2 printf("Fatal Error: Isr_Ep0TxDone Unexpected FSMState=%x\n",bD13flags.bits.DCP_state); 230 2 bD13flags.bits.DCP_state = USBFSM4DCP_STALL; 231 2 // printf("bD13flags.bits.DCP_state = x%hx\n", bD13flags.bits.DCP_state); 232 2 Hal4D13_StallEP0InControlRead(); 233 2 break; 234 2 } 235 1 } 236 C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 5 237 238 void Isr_Ep01Done(void) 239 { 240 1 /* 241 1 UCHAR c; 242 1 c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP01); 243 1 */ 244 1 } 245 246 247 void Isr_Ep02Done(void) 248 { 249 1 /* 250 1 HAR c; 251 1 c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP02); 252 1 */ 253 1 254 1 } 255 256 257 void Isr_Ep03Done(void) 258 { 259 1 UCHAR ep_last; 260 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP03); /* Clear interrupt flag*/ 261 1 /* 262 1 UCHAR ep_last, DoubleBuff=1; 263 1 UCHAR len; 264 1 USHORT far *fp; 265 1 USHORT seg, off; 266 1 267 1 ep_last = (UCHAR)Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP03); // Clear interrupt flag 268 1 269 1 // Check for Double Buffer Condition 270 1 if((ep_last & 0x60) == 0x60) 271 1 DoubleBuff = 2; 272 1 else 273 1 DoubleBuff = 1; 274 1 275 1 if (!(ep_last & (D13REG_EPSTS_DBF0|D13REG_EPSTS_DBF1)) || (ep_last & 0x80)) 276 1 { 277 1 printf("ep_last = %x, \n", ep_last); 278 1 return ; 279 1 } 280 1 else //Data Out Packet 281 1 { 282 1 while(DoubleBuff) 283 1 { 284 1 if (ioCount <= ioSize) 285 1 { 286 1 // Initialise the pointer 287 1 seg = (ioBuffer + ioCount)>>4; 288 1 off = (ioBuffer + ioCount)&0xf; 289 1 fp = MK_FP(seg, off); 290 1 291 1 // Determine the Transfer length 292 1 if((ioSize-ioCount) >64) 293 1 len = 64; 294 1 else 295 1 { 296 1 len = ioSize - ioCount; 297 1 if(bD13flags.bits.dma_state == DMA_PENDING) 298 1 bD13flags.bits.setup_dma = 1; C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 6 299 1 else 300 1 bD13flags.bits.dma_state = DMA_IDLE; 301 1 } 302 1 // Read in Data from Endpoint, and update the ioCount 303 1 ioCount += Hal4D13_ReadBulkEndpoint(EPINDEX4EP03, fp, len); 304 1 } 305 1 else 306 1 { 307 1 Hal4D13_ClearBuffer(EPINDEX4EP03); 308 1 if(bD13flags.bits.dma_state == DMA_PENDING) 309 1 bD13flags.bits.setup_dma = 1; 310 1 else 311 1 bD13flags.bits.dma_state = DMA_IDLE; 312 1 } 313 1 DoubleBuff --; 314 1 315 1 if(DoubleBuff == 1) 316 1 ep_last = (UCHAR)Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP03); // Clear interrupt flag 317 1 } 318 1 } 319 1 */ 320 1 } 321 322 323 void Isr_Ep04Done(void) 324 { 325 1 UCHAR ep_last; 326 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP04); /* Clear interrupt flag*/ 327 1 /* 328 1 USHORT len; 329 1 USHORT far *fp; 330 1 USHORT seg, off; 331 1 UCHAR DoubleBuff=0; 332 1 UCHAR ep_last; 333 1 334 1 ep_last = (UCHAR)Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP04); // Clear interrupt flag 335 1 336 1 if((ep_last & (D13REG_EPSTS_DBF0|D13REG_EPSTS_DBF1)) == 0x00) 337 1 DoubleBuff = 2; 338 1 else 339 1 DoubleBuff = 1; 340 1 341 1 if((ep_last & (D13REG_EPSTS_DBF0|D13REG_EPSTS_DBF1)) == 0x60) 342 1 { 343 1 // BUFFER IS NOT EMPTY 344 1 printf("ep_last = %x, \n", ep_last); 345 1 return ; 346 1 } 347 1 else // Data IN Packet 348 1 { 349 1 while(DoubleBuff) 350 1 { 351 1 // Initialise the pointer 352 1 seg = (ioBuffer + ioCount)>>4; 353 1 off = (ioBuffer + ioCount)&0xf; 354 1 fp = MK_FP(seg, off); 355 1 356 1 // Determine the Transfer length 357 1 if(ioSize >= ioCount) 358 1 len = ioSize - ioCount; 359 1 360 1 if(len > 64) C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 7 361 1 { 362 1 ioCount += Hal4D13_WriteBulkEndpoint(EPINDEX4EP04, fp, 64); 363 1 bD13flags.bits.dma_state = DMA_IDLE; 364 1 } 365 1 else if(len >= 1) 366 1 { 367 1 ioCount += Hal4D13_WriteBulkEndpoint(EPINDEX4EP04, fp, len); 368 1 bD13flags.bits.dma_state = DMA_IN_DONE; 369 1 } 370 1 371 1 DoubleBuff--; 372 1 if(DoubleBuff == 1) 373 1 ep_last = (UCHAR)Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP04); // Clear interrupt flag 374 1 } 375 1 } 376 1 */ 377 1 } 378 379 void Isr_Ep05Done(void) 380 { 381 1 UCHAR ep_last, DoubleBuff=1; 382 1 USHORT ISO_Buffer[512], len; 383 1 384 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP05); // Clear interrupt flag 385 1 386 1 if((ep_last & (D13REG_EPSTS_DBF0|D13REG_EPSTS_DBF1)) == 0x00) 387 1 DoubleBuff = 2; 388 1 else 389 1 DoubleBuff = 1; 390 1 391 1 if (ep_last | D13REG_EPSTS_DBF0|D13REG_EPSTS_DBF1) 392 1 { 393 2 return ; 394 2 } 395 1 396 1 else //Data Out Packet 397 1 { 398 2 399 2 if((ep_last & 0x60) != 0x00) 400 2 { 401 3 402 3 if(DoubleBuff == 2) 403 3 { 404 4 while(DoubleBuff) 405 4 { 406 5 len = Hal4D13_ReadISOEndpoint(EPINDEX4EP05, ISO_Buffer, 512); 407 5 Hal4D13_WriteISOEndpoint(EPINDEX4EP06, ISO_Buffer, len); 408 5 DoubleBuff--; 409 5 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP05); // Clear interrupt flag 410 5 } 411 4 } 412 3 else 413 3 { 414 4 len = Hal4D13_ReadISOEndpoint(EPINDEX4EP05, ISO_Buffer, 512); 415 4 Hal4D13_WriteISOEndpoint(EPINDEX4EP06, ISO_Buffer, len); 416 4 417 4 } 418 3 419 3 } 420 2 } 421 1 } *** ERROR C241 IN LINE 421 OF ISR.C: 'Isr_Ep05Done': auto segment too large C51 COMPILER V7.06 ISR 08/18/2005 15:30:29 PAGE 8 422 423 void Isr_Ep06Done(void) 424 { 425 1 UCHAR ep_last; 426 1 ep_last = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP06); /* Clear interrupt flag*/ 427 1 } 428 429 430 void Isr_Ep07Done(void) 431 { 432 1 433 1 // UCHAR c; 434 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP07); /* Clear interrupt flag */ 435 1 436 1 } 437 void Isr_Ep08Done(void) 438 { 439 1 // UCHAR c; 440 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP08); /* Clear interrupt flag */ 441 1 } 442 void Isr_Ep09Done(void) 443 { 444 1 // UCHAR c; 445 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP09); /* Clear interrupt flag */ 446 1 } 447 void Isr_Ep0ADone(void) 448 { 449 1 // UCHAR c; 450 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0A); /* Clear interrupt flag */ 451 1 } 452 void Isr_Ep0BDone(void) 453 { 454 1 // UCHAR c; 455 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0B); /* Clear interrupt flag */ 456 1 } 457 void Isr_Ep0CDone(void) 458 { 459 1 // UCHAR c; 460 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0C); /* Clear interrupt flag */ 461 1 } 462 void Isr_Ep0DDone(void) 463 { 464 1 // UCHAR c; 465 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0D); /* Clear interrupt flag */ 466 1 } 467 void Isr_Ep0EDone(void) 468 { 469 1 // UCHAR c; 470 1 // c = Hal4D13_GetEndpointStatusWInteruptClear(EPINDEX4EP0E); /* Clear interrupt flag */ 471 1 } 472 473 //********************************************************************* 474 // supporting Functions 475 //********************************************************************* 476 477 478 C51 COMPILATION COMPLETE. 1 WARNING(S), 4 ERROR(S)