The images are

1. The Altera Student version CDROM - included with the text.
2. The Altera UP 1 student CPLD board - used to implement designs with up to 20,000 gates.
3. A life game with video output generated by the UP1 board.
4. A VHDL simulation using the Altera student version CAD tools.
5. A silicon wafer containing several unpackaged FPLDs.
6. An Altera FLEX 10K100  with 10,000,000 transistors.
7. A train system control simulation generated by the UP1 board.
8. An RLE encoded bitmap VGA output generated by the UP1 board.
9. A fractal-like display generated by the UP1 board.
10. A meta assembler for student computer designs.
11. A robot controlled by the UP1 board.
12. A character display with keyboard input generated by the UP1 board.
13. A mouse driver with video output implemented on the UP1 board.
14. A logic analyzer type display of a MIPS processor core, both are implemented on the UP1 board.