LFSR testbench - last updated July 5th, 2000.

Updated 07/05/2000 - version 1.10 fixes the schematic feedback paths when the 'extended-sequence logic' is used. HDL generation was correct and has not changed. Thanks for Rick Collins for bringing that to my attention.
Updated 05/22/2000 - version 1.00 fixes the HDL code generation - looks good now.
Updated 02/03/2000 - version 0.41 improves the GUI.

05/30/2000 - new LVDS page.

LFSRs are pretty well known and understood. You can find numerous descriptions in the literature and on the net.
My contribution is LFSR testbench 1.10 (154KB) software. It will help you understand LFSR basics:

• Change interactively the LFSR settings (length, taps...).
• Visualize the schematic.
• Get the binary sequence list and length.
• Get the corresponding HDL designs (in VHDL, AHDL and Verilog)

Note that the software always produces non-parameterized LFSR designs, so here's an example of a parameterized one (AHDL).

LFSR related links:

What's an LFSR? (PDF TI article), LFSR counters (EDN PDF) and LFSR (EDN HTM).

Nice books:

Bebop to the Boolean Boogie (excellent description about LFSRs and their applications - page 351) and HDL Chip Design (good LFSR description, excellent HDL book).

Contact me? jn@lords.com - or get back to Jean's Home Page

Here comes the usual disclaimer: These software and all the accompanying files are provided "as is" and without any warranties expressed or implied including but not limited to implied warranties of merchantability and fitness for a particular purpose. In no event should the author be liable for any damages whatsoever (including without limitation, damages for loss of business profits, business interruption, loss of business information, or any other pecuniary loss) arising out of the use or inability to use this product.