//  Port Offset for ISP1362
#define HC_DATA_PORT      0
#define HC_COMMAND_PORT   1
#define D13_DATA_PORT     2
#define D13_COMMAND_PORT  3

#define device_name	"ISP1362"
#define ram_size 4096

#define SETUP 0
#define OUT   1
#define IN    2
#define TRUE  1
#define FALSE 0

#define HcControl   		0x01
#define HcCmdStatus 		0x02
#define HcIntStatus	    	0x03
#define HcIntEnable	    	0x04
#define HcIntDisable    	0x05
#define HcFmItv		    	0x0D
#define HcFmNo		    	0x0F
#define HcRhA		    	0x12
#define HcRhB		    	0x13
#define HcRhStatus		0x14
#define HcRhP1		    	0x15
#define HcRhP2		    	0x16
#define HcIntDone			0x17
#define HcIntSkip			0x18
#define HcIntLast			0x19
#define HcIntActive	    	0x1A
#define HcATLDone	 		0x1B
#define HcATLSkip	 		0x1C
#define HcATLLast	 		0x1D
#define HcATLActive  		0x1E
#define HcHWCfg	     		0x20
#define HcDMACfg			0x21
#define HcTransferCnt 		0x22
#define HcUpInt       		0x24
#define HcUpIntEnable		0x25
#define HcChipID       		0x27
#define HcScratch     	  	0x28
#define HcBufStatus   		0x2C
#define HcPTLLen			0x30
#define HcDirAddrLen		0x32
#define HcINTLen			0x33
#define HcATLLen     		0x34
#define HcPTL0_Port	  	    0x40
#define HcPTL1_Port	   		0x42
#define HcInt_Port	   		0x43
#define HcATL_Port 	    	0x44
#define HcDirAddr_Port		0x45
#define HcPTLTogRate		0x47
#define HcATLThrsCnt    	0x51
#define HcATLTimeOut    	0x52
#define HcIntBlkSize		0x53
#define HcATLBlkSize 		0x54

#define OTGControl			0x62
#define OTGStatus	    	0x67
#define OTGInterrupt  	    0x68
#define OTGInterruptEnable  0x69
#define OTGTimerControl     0x6A

#define HcReset		    	0xA9


//void ISP1362_Acquire(unsigned char g_host_IRQ_num);